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pl60708x pcie octal, ultra-low jitter, hcsl frequency synthesizer ripple blocker is a trademark of micrel, inc. micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944 - 0800 ? fax + 1 (408) 474 - 1000 ? http://www.micrel.com april 1, 2014 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 general description the pl607081 and pl607 082 are members of the pci express family of devices from micrel and provide extremely low-noise spread-spectrum clocks for pci express requirements. the devices operate from a 3.3v or 2.5v power supply and synthesize eight hcsl output clocks. the pl607081 synthesizes 25mhz, 100mhz, or 200mhz frequencies and the pl607082 synthesizes 25mhz, 125mhz, or 250mhz frequencies. the pl60708x devices accept a 25mhz crystal or lvcmos reference clock. datasheets and support documentation are available on micrels web site at : www.micrel.com . block diagram features ? generates eight hcsl clock outputs ? pl607081 output frequencies: 25mhz, 100mhz, or 200mhz ? pl607082 output frequencies: 25mhz, 125mhz, or 250mhz ? sp read spectrum for emi reduction ? 2.5v or 3.3v operating range ? typical phase jitter @ 100mhz : 32 0fs for 1.5m hz to 10mhz ? compliant with pci express gen1, gen2, and gen3 ? industrial temperature range ( C 40 c to +85c) ? rohs and pfos compliant ? available in a 44 -pin 7mm 7mm qfn package applications ? servers ? storage systems ? switches and routers ? gigabit ethernet ? set-top boxes/dvrs downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 2 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 ordering information ( 1 ) part number marking shipping junction temperature range package PL607081UMG pl 607 081 tray C 4 0 c to + 85 c 44 -pin qfn PL607081UMG tr pl 607 081 tape and reel C 40 c to +85c 44 -pin qfn pl607082umg pl 607 082 tray C 40 c to +85c 44 -pin qfn pl607082umg tr pl 607 082 tape and reel C 40 c to +85c 44 -pin qfn note: 1. devices are rohs and pfos compliant. downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 3 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 pin configuration 44 -pin qfn (top view) pin description pin number pin name pin type pin level pin name 1, 2 4, 5 7, 8 25, 26 29 , 30 32, 33 36 , 3 7 41, 42 /q5, q5 /q6, q6 /q7, q7 /q0, q0 /q1, q1 /q2, q2 /q3, q3 /q4, q4 o, (dif) hcsl differential clock output 14 fsel i, (se) lvcmos frequency select, 45k ? pull- up pl607081: 1 = 100mhz, 0 = 200mhz pl607082: 1 = 125mhz, 0 = 250mhz 12, 13, 34 vdd pwr power supply 31 vddo1 pwr power supply for outputs q0 C q3 43 vddo2 pwr power supply for outputs q4 C q7 16, 19, 20, 21, 44 vss (exposed pad) pwr core power supply ground. the exposed pad must be connected to the vss ground plane. 24 vsso1 pwr power supply ground for outputs q0 C q3 39 vsso2 pwr power supply ground for outputs q4 C q7 10 gnd i lvcmos this pin is not a power supply ground but must be tied to vss for proper operation. downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 4 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 pin description (continued) pin number pin name pin type pin level pin name 9 pll_bypass i, (se) lvcmos pll bypass, selects output source. 0 = normal pll operation 1 = output from input reference clock or crystal 45 k ? pull-down 3, 11 , 17, 18 , 23, 27, 35 test factory test pins. do not connect anything to these pins. 40 x in/fin i, (se) 15pf crystal crystal or reference clock input, no load caps needed (see figure 7 ) 38 xout o, (se) 15 pf crystal crystal output, no load caps needed (see figure 7 ) 15 oe1 i, (se) lvcmos output enable, outputs q0 C q3 disable to tri-state, 0 = disabled, 1 = enabled, 45 k ? pull- up 22 oe2 i, (se) lvcmos output enable, outputs q4 C q7 disable to tri-state, 0 = disabled, 1 = enabled, 45 k ? pull- up 28 ss0 i, (se) lvcmos spread-spectrum select, 60k ? pull - up 0 = spread off, 1 = spread on 6 ss1 i, (se) lvcmos spread-spectrum select, 60 k ? pull - up 0 = ? 0.25%, 1 = spread ? 0.50% downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 5 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 emi reduction spread-spectrum modulation reduces the emission of spectral components in the clock signal. the spectrum plot on the right ( figure 1 ) shows measurement results with the two spread settings versus no spread. this plot refers to the 11th harmonic in a 100mhz clock, at 1.1ghz. the scale is normalized to the strength of this spur without spread. the plot shows about 21db reduction for ? 0.25% spread magnitude and 24db for ? 0.50% spread magnitude. the plot also shows how the frequency spreads downwards. figure 1 . spectrum plot downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 6 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 absolute maximum ratings ( 2 ) supply voltage (v dd , v dd o1/2 ) ...................................... +4.6v input voltage (v in ) ............................... ? 0.50v to v dd +0.5v lead temperature (soldering, 20s) ............................ 260c case temperature ..................................................... 115c storage temperature (t s ) ......................... ? 65 c to + 150 c operating ratings ( 3 ) supply voltage (v dd , v ddo1/2 ) ............... +2.375v to +3.465v ambient temperature (t a ) .......................... C 40c to +85c junction thermal resistance ( 4 ) qfn ( ? ja ) still-air ............................................... 24 c/w qfn ( ? jb ) junction- to -board ............................... 8c/w dc electrical characteristics ( 5 ) v dd = v ddo1/2 = 3.3v 5% or 2.5v 5% v dd = 3.3v 5%, v ddo1/2 = 3.3v 5% or 2.5v 5% t a = ? 40 c to + 85 c symbol parameter condition min. typ. max. units v dd , v ddo1/2 2.5v operating range 2.375 2.5 2.625 v v dd , v ddo1/2 3.3v operating range 3.135 3.3 3.465 v i dd supply current v dd + v ddo eight outputs enabled, 100mhz outputs 50 to v ss 230 285 ma eight outputs enabled, 200mhz outputs 50 to v ss 240 300 four outputs enabled, 100mhz outputs 50 to v ss , oe1 or oe2 = 0 160 200 four outputs enabled, 200mhz outputs 50 to v ss , oe1 or oe2 = 0 170 210 hcsl dc electrical characteristics ( 5 ) v dd = v ddo1/2 = 3.3v 5% or 2.5v 5% v dd = 3.3v 5%, v ddo1/2 = 3.3v 5% or 2.5v 5% t a = ? 40 c to + 85 c. r l = 50 to v ss symbol parameter condition min. typ. max. units v oh output high voltage 660 700 850 mv v ol output low voltage ? 150 0 27 mv v cross crossing point voltage 250 350 550 mv notes: 2. exceeding the absolute maximum ratings may damage the device. 3. the device is not guaranteed to function outside its opera ting ratings. 4. package thermal resistance assumes that the exposed pa d is soldered (or equivalent) to the device s most negative potential on the pcb. 5. specification for packaged product only. downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 7 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 lvcmos (pll_bypass, fsel, oe1, oe2, ss0, ss1 ) dc electrical characteristics ( 5 ) v dd = 3.3v 5% or 2.5v 5% , t a = ? 40 c to + 85 c. symbol parameter condition min. typ. max. units v ih input h igh voltage 2 v dd + 0.3 v v il in put low voltage ? 0.3 0.8 v i ih input h igh current v dd = v in = 3.465v 1 50 a i il input low current v dd = 3.465v, v in = 0v ? 150 a crystal characteristics parameter condition min. typ. max. units mode of oscillation 15 pf load fundamental, parallel resonant frequency 25 mhz equivalent series resistance (esr) 50 ? shunt capacitor, c0 2 5 pf correlation drive level 10 100 w downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 8 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 ac electrical characteristics ( 4, 6 ) v dd = v ddo1/2 = 3.3v 5% or 2.5v 5% v dd = 3.3v 5%, v ddo1/2 = 3.3v 5% or 2.5v 5% t a = ? 40 c to + 85 c. r l = 50 to v ss symbol parameter condition min. typ. max. units f out output frequency pl607081 25 100 200 mhz pl607082 25 1 25 250 mhz f ref crystal input frequency 25 mhz fin reference input frequency 25 mhz fin fin signal amplitude internally ac coupled 0.9 v dd vpp t r /t f hcsl output rise/fall time 20% ? 80% 150 300 450 ps odc output duty cycle 48 50 52 % t skew output- to -output skew note 7 45 ps t lock pll lock time 20 ms t jit ( ? ) rms phase jitter ( 8 ) 100 mhz integration range (1.5mhz to 10mhz) 320 fs cycle to cycle jitter 30 ps, peak spread spectrum characteristics parameter condition min. typ. max. units modulation rate ( 9 ) 31.6 k hz modulation magnitude ( 10 ) setting is ? 0.25% -0.073 to -0.265 0 to ? 0.250 +0.031 to -0.375 % setting is ? 0.50% -0.136 to -0.383 0 to ? 0.500 +0.078 to -0.589 % notes: 6. all phase noise measurements were taken with an agilent 5052b phase noise system. 7. defined as skew between outputs at the same supply volta ge and with equal load conditions; measured at the output differential crossing points. 8. measured using a 25mhz crystal as the input reference source. if using a n external reference input, use a low phase noise source. with an external reference, the phase noise follows the input source ph ase noise up to about 1mhz. 9. the modulation rate is the crystal frequency divided by 792. 10. the typical modulation makes the output frequency sweep be tween the target frequency (0%) and the down-spread value ( ? 0.25% or ? 0.5%). the re is process variation on the modulation magnitude; the smalle st and largest possible modulation magnitude sweep ranges ar e listed in the spread spectrum characteristics table. downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 9 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 truth tables oe2 oe1 output 0 1 q4 -q7 tri-state 1 0 q0 -q3 tri-state fsel pll_bypass output frequency (mhz) pl607081 pl607082 0 0 200 250 1 0 100 125 x 1 25 25 ss 1 ( 11 ) ss0 ( 11 ) spread type spread 0 0 spread is off no spread 0 1 down spread ? 0.25% 1 0 spread is off no spread 1 1 down spread ? 0.5 0% note: 11. ss0 turns on/off spread-spectrum modulation and ss1 selects the spread magnitude. downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 10 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 phase noise plot phase noise plot: 100mhz, 1.5mhz to 10mhz 320fs downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 11 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 figure 2 . duty cycle timing figure 3 . all outputs rise/fall time figure 4 . rms phase/noise jitter figure 5 . hcsl output load and test circuit downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 12 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 figure 6 . hcsl recommended application termination (source terminated) figure 7 . crystal input interface downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 13 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 application information crystal layout keep the layers under the crystal as open as possible and do not place switching signals or noisy supplies und er the crystal. crystal load capacitance is built inside the die so no external capacitance is needed. see the selecting a quartz crystal for the clockworks flex family of precision synthesizers application note for more details. contact micrels hbw appli cations group at: tcghelp@micrel.com if you need help selecting a suitabl e crystal for your application power supply decoupling place the smallest value decoupling capacitor (4.7nf) between the vdd and vss pins, as close as possible to those pins and at the same side of the pcb as the ic. the shorter the physical path from vdd to capacitor and back from capacitor to vss, the more effective the decoupling. use one 4.7nf capacitor for each vdd pin on the pl6070 8x . the impedance value of the ferrite bead (fb) must be between 240 and 600 with a saturation current 150ma. the vddo1 and vddo2 pins connect directly to the vdd p la ne. all vdd pins on the pl60708x connect to vdd after the power supply filter. hcsl outputs terminate hcsl outputs with 50 to v ss . for best performance, load all outputs. if you want to ac-couple or change the termination, contact micrels application s group at : tcghelp@micrel.com (see figure 6 ). power supply filtering recommendations preferred filter, using micrel mic94300 or mic94310 ripple blocker ? : alternative, traditional filter, using a ferrite bead: downloaded from: http:///
micrel, inc. pl60708x april 1 , 2014 14 revision 1. 2 tcghelp@micrel.com or (408) 955-1690 package information ( 12 ) 44 -pin qfn note: 12. package information is correct as of the publication dat e. for updates and most current information, go to www.micrel.com . micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com micrel makes no representations or warranties with respect to the accuracy or completeness of the information fur nished in this data sheet. thi s information is not intended as a warranty and micrel does n ot assume responsibility for its use. micrel reserves th e right to change circuitry, specifications and descriptions at any time without notice . no license, whether express, implied, arising by est oppel or otherwise, to any intellectual property rights is granted by this document. except as provided in micrels terms and conditions of sale for such products, micrel assumes no liability whatsoever, and micrel disclaims any express or implied warra nty relating to the sale and/or use of micrel products includ ing liability or warranties relating to fitness for a particular purpose, merchantabilit y, or infringement of any patent, copyright or other intelle ctual property right. micrel products are not designed or authorized for use a s components in life support appliances, devices or syste ms where malfunction of a product can reasonably be expected to result in personal injury. l ife support devices or systems are devices or systems t hat (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. a purchasers use or sale of micrel products for use in li fe support appliances, devices or systems is a purcha sers own risk a nd purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2014 micrel, incorporated. downloaded from: http:///

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